GATE || Digital Logic || PYQ || 2026 || Module 4: Combinational Circuit

Consider the digital circuit shown below with two input lines A and B, two select lines S0 and S1, and an output line Y. The blocks Q and M represent an active-high 2:4 decoder and a 4-to-1 multiplexer, respectively. Out of 16 possible input combinations, the number of combinations that produce Y = 1 is __________. (Answer in integer). [GATE || 2026 NAT || 2-mark ]

Consider a digital display system (DDS) shown in the figure that displays the contents of register X. A 16- bit code word is used to load a word in X, either from S or from R. S is a 1024-word memory segment and R is a 32-word register file. Based on the value of mode bit M, T selects an input word to load in X. P and Q interface with the corresponding bits in the code word to choose the addressed word. Which one of the following represents the functionality of P, Q, and T? [GATE || 2022 MCQ || 2-mark ]